Difference between revisions of "MC6845"
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− | The [[MC6845 | + | The [[MC6845]] CRT Controller performs the interface to raster scan CRT displays. It is intended for use in processor-based controllers for CRT terminals in stand-alone or cluster configurations. The CRTC is optimized for hardware/software balance in order to achieve integration of all key functions and maintain flexibility. Forinstance, all keyboard functions, R/W, cursor movements, and editingare under processor control; whereas the CRTC provides video timing and Refresh Memory Addressing. |
• Applications include "glass-teletype," smart, programmable, intel-ligent CRT terminals; video games; information display. | • Applications include "glass-teletype," smart, programmable, intel-ligent CRT terminals; video games; information display. |
Revision as of 19:29, 10 February 2010
The MC6845 CRT Controller performs the interface to raster scan CRT displays. It is intended for use in processor-based controllers for CRT terminals in stand-alone or cluster configurations. The CRTC is optimized for hardware/software balance in order to achieve integration of all key functions and maintain flexibility. Forinstance, all keyboard functions, R/W, cursor movements, and editingare under processor control; whereas the CRTC provides video timing and Refresh Memory Addressing.
• Applications include "glass-teletype," smart, programmable, intel-ligent CRT terminals; video games; information display.
• Alphanumeric, semi-graphic, and full graphic capability.
• Fully programmable via processor data bus. Can generate timing for almost any alphanumeric screen density, e.g. 80 x 24, 72 x 64,132 x 20, etc.
• Single +5 volt supply. TTL/6800 compatible I/O.
• Hardware scroll (paging or by line or by character).
• Compatible with CPU's and MPU's which provide a means forsynchronizing external devices.
• Cursor register and compare circuitry.
• Cursor format and blink are programmable.
• Light pen register.
• Line buffer-less operation. No external DMA required. RefreshMemory is multiplexed between CRTC and MPU.
• Programmable Interlace or non-interlace scan.
• 14-bit wide refresh address